&switch0 {
ports {
SWITCH_PORT(16, 9, qsgmii)
+
/* TODO: fixed link SFP is not right */
- SWITCH_SFP_PORT(24, 10, rgmii-id)
+ port24: port@24 {
+ reg = <24>;
+ label = SWITCH_PORT_LABEL(10);
+ pcs-handle = <&serdes4>;
+ phy-handle = <&phy24>;
+ phy-mode = "1000base-x";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
};
};
&switch0 {
ports {
/* TODO: fixed link SFP is not right */
- SWITCH_SFP_PORT(24, 9, 1000base-x)
- SWITCH_SFP_PORT(26, 10, 1000base-x)
+
+ port24: port@24 {
+ reg = <24>;
+ label = SWITCH_PORT_LABEL(9);
+ pcs-handle = <&serdes4>;
+ phy-handle = <&phy24>;
+ phy-mode = "1000base-x";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ port26: port@26 {
+ reg = <26>;
+ label = SWITCH_PORT_LABEL(10);
+ pcs-handle = <&serdes5>;
+ phy-handle = <&phy26>;
+ phy-mode = "1000base-x";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
};
};
SWITCH_PORT(8, 8, internal)
/* TODO: fixed link SFP is not right */
- SWITCH_SFP_PORT(24, 9, 1000base-x)
- SWITCH_SFP_PORT(26, 10, 1000base-x)
+ port24: port@24 {
+ reg = <24>;
+ label = SWITCH_PORT_LABEL(9);
+ pcs-handle = <&serdes4>;
+ phy-handle = <&phy24>;
+ phy-mode = "1000base-x";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ port26: port@26 {
+ reg = <26>;
+ label = SWITCH_PORT_LABEL(10);
+ pcs-handle = <&serdes5>;
+ phy-handle = <&phy26>;
+ phy-mode = "1000base-x";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
port@28 {
ethernet = <ðernet0>;
#address-cells = <1>;
#size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(24, 17, qsgmii)
- SWITCH_PORT(25, 18, qsgmii)
- SWITCH_PORT(26, 19, qsgmii)
- SWITCH_PORT(27, 20, qsgmii)
+ SWITCH_PORT_SDS(24, 17, 4, qsgmii)
+ SWITCH_PORT_SDS(25, 18, 4, qsgmii)
+ SWITCH_PORT_SDS(26, 19, 4, qsgmii)
+ SWITCH_PORT_SDS(27, 20, 4, qsgmii)
port@28 {
ethernet = <ðernet0>;
#address-cells = <1>;
#size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(24, 17, qsgmii)
- SWITCH_PORT(25, 18, qsgmii)
- SWITCH_PORT(26, 19, qsgmii)
- SWITCH_PORT(27, 20, qsgmii)
+ SWITCH_PORT_SDS(24, 17, 4, qsgmii)
+ SWITCH_PORT_SDS(25, 18, 4, qsgmii)
+ SWITCH_PORT_SDS(26, 19, 4, qsgmii)
+ SWITCH_PORT_SDS(27, 20, 4, qsgmii)
port@28 {
ethernet = <ðernet0>;
#address-cells = <1>;
#size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(24, 17, qsgmii)
- SWITCH_PORT(25, 18, qsgmii)
- SWITCH_PORT(26, 19, qsgmii)
- SWITCH_PORT(27, 20, qsgmii)
+ SWITCH_PORT_SDS(24, 17, 4, qsgmii)
+ SWITCH_PORT_SDS(25, 18, 4, qsgmii)
+ SWITCH_PORT_SDS(26, 19, 4, qsgmii)
+ SWITCH_PORT_SDS(27, 20, 4, qsgmii)
port@28 {
ethernet = <ðernet0>;
#address-cells = <1>;
#size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
port@24 {
reg = <24>;
#address-cells = <1>;
#size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
- SWITCH_PORT(24, 25, qsgmii)
- SWITCH_PORT(25, 26, qsgmii)
- SWITCH_PORT(26, 27, qsgmii)
- SWITCH_PORT(27, 28, qsgmii)
+ SWITCH_PORT_SDS(24, 25, 4, qsgmii)
+ SWITCH_PORT_SDS(25, 26, 4, qsgmii)
+ SWITCH_PORT_SDS(26, 27, 4, qsgmii)
+ SWITCH_PORT_SDS(27, 28, 4, qsgmii)
port@28 {
ethernet = <ðernet0>;
SWITCH_PORT(14, 7, internal)
SWITCH_PORT(15, 8, internal)
- SWITCH_PORT(16, 9, qsgmii)
- SWITCH_PORT(17, 10, qsgmii)
- SWITCH_PORT(18, 11, qsgmii)
- SWITCH_PORT(19, 12, qsgmii)
- SWITCH_PORT(20, 13, qsgmii)
- SWITCH_PORT(21, 14, qsgmii)
- SWITCH_PORT(22, 15, qsgmii)
- SWITCH_PORT(23, 16, qsgmii)
+ SWITCH_PORT_SDS(16, 9, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 10, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 11, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 12, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 13, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 14, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 15, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 16, 3, qsgmii)
- SWITCH_PORT(24, 17, qsgmii)
- SWITCH_PORT(25, 18, qsgmii)
- SWITCH_PORT(26, 19, qsgmii)
- SWITCH_PORT(27, 20, qsgmii)
+ SWITCH_PORT_SDS(24, 17, 4, qsgmii)
+ SWITCH_PORT_SDS(25, 18, 4, qsgmii)
+ SWITCH_PORT_SDS(26, 19, 4, qsgmii)
+ SWITCH_PORT_SDS(27, 20, 4, qsgmii)
port@28 {
ethernet = <ðernet0>;
#address-cells = <1>;
#size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
- SWITCH_PORT(24, 25, qsgmii)
- SWITCH_PORT(25, 26, qsgmii)
- SWITCH_PORT(26, 27, qsgmii)
- SWITCH_PORT(27, 28, qsgmii)
+ SWITCH_PORT_SDS(24, 25, 4, qsgmii)
+ SWITCH_PORT_SDS(25, 26, 4, qsgmii)
+ SWITCH_PORT_SDS(26, 27, 4, qsgmii)
+ SWITCH_PORT_SDS(27, 28, 4, qsgmii)
port@28 {
ethernet = <ðernet0>;
SWITCH_PORT(14, 7, internal)
SWITCH_PORT(15, 8, internal)
- SWITCH_PORT(16, 9, qsgmii)
- SWITCH_PORT(17, 10, qsgmii)
- SWITCH_PORT(18, 11, qsgmii)
- SWITCH_PORT(19, 12, qsgmii)
- SWITCH_PORT(20, 13, qsgmii)
- SWITCH_PORT(21, 14, qsgmii)
- SWITCH_PORT(22, 15, qsgmii)
- SWITCH_PORT(23, 16, qsgmii)
+ SWITCH_PORT_SDS(16, 9, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 10, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 11, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 12, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 13, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 14, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 15, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 16, 3, qsgmii)
port@24 {
reg = <24>;
#address-cells = <1>;
#size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
port@28 {
ethernet = <ðernet0>;
SWITCH_PORT(14, 7, internal)
SWITCH_PORT(15, 8, internal)
- SWITCH_PORT(16, 9, qsgmii)
- SWITCH_PORT(17, 10, qsgmii)
- SWITCH_PORT(18, 11, qsgmii)
- SWITCH_PORT(19, 12, qsgmii)
- SWITCH_PORT(20, 13, qsgmii)
- SWITCH_PORT(21, 14, qsgmii)
- SWITCH_PORT(22, 15, qsgmii)
- SWITCH_PORT(23, 16, qsgmii)
+ SWITCH_PORT_SDS(16, 9, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 10, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 11, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 12, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 13, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 14, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 15, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 16, 3, qsgmii)
port@28 {
ethernet = <ðernet0>;
#address-cells = <1>;
#size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
port@28 {
ethernet = <ðernet0>;
#address-cells = <1>;
#size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
port@28 {
ethernet = <ðernet0>;
&switch0 {
ports {
- SWITCH_PORT(16, 9, qsgmii)
- SWITCH_PORT(17, 10, qsgmii)
- SWITCH_PORT(18, 11, qsgmii)
- SWITCH_PORT(19, 12, qsgmii)
- SWITCH_PORT(20, 13, qsgmii)
- SWITCH_PORT(21, 14, qsgmii)
- SWITCH_PORT(22, 15, qsgmii)
- SWITCH_PORT(23, 16, qsgmii)
+ SWITCH_PORT_SDS(16, 9, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 10, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 11, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 12, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 13, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 14, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 15, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 16, 3, qsgmii)
};
};
&switch0 {
ports {
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
port@24 {
reg = <24>;
&switch0 {
ports {
- SWITCH_PORT(1, 1, qsgmii)
- SWITCH_PORT(0, 2, qsgmii)
- SWITCH_PORT(3, 3, qsgmii)
- SWITCH_PORT(2, 4, qsgmii)
- SWITCH_PORT(5, 5, qsgmii)
- SWITCH_PORT(4, 6, qsgmii)
- SWITCH_PORT(7, 7, qsgmii)
- SWITCH_PORT(6, 8, qsgmii)
+ SWITCH_PORT_SDS(1, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(0, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(5, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(4, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 8, 1, qsgmii)
SWITCH_PORT(9, 9, internal)
SWITCH_PORT(8, 10, internal)
SWITCH_PORT(15, 15, internal)
SWITCH_PORT(14, 16, internal)
- SWITCH_PORT(17, 17, qsgmii)
- SWITCH_PORT(16, 18, qsgmii)
- SWITCH_PORT(19, 19, qsgmii)
- SWITCH_PORT(18, 20, qsgmii)
- SWITCH_PORT(21, 21, qsgmii)
- SWITCH_PORT(20, 22, qsgmii)
- SWITCH_PORT(23, 23, qsgmii)
- SWITCH_PORT(22, 24, qsgmii)
+ SWITCH_PORT_SDS(17, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(16, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(21, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(20, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 24, 3, qsgmii)
};
};
&switch0 {
ports {
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
};
};
&switch0 {
ports {
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
port@24 {
reg = <24>;
&switch0 {
ports {
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
+ SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+ SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+ SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+ SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+ SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+ SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+ SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+ SWITCH_PORT_SDS(7, 8, 1, qsgmii)
SWITCH_PORT(8, 9, internal)
SWITCH_PORT(9, 10, internal)
SWITCH_PORT(14, 15, internal)
SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
+ SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+ SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+ SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+ SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+ SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+ SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+ SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+ SWITCH_PORT_SDS(23, 24, 3, qsgmii)
port@24 {
sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL);
}
- /* Power on fibre ports and reset them if necessary */
- if (priv->ports[24].phy == PHY_RTL838X_SDS) {
- pr_debug("Powering on fibre ports & reset\n");
- rtl8380_sds_power(24, 1);
- rtl8380_sds_power(26, 1);
- }
-
return 0;
}
return priv->pcs[port];
}
+__attribute__((unused))
static void rtl83xx_config_interface(int port, phy_interface_t interface)
{
u32 old, int_shift, sds_shift;
mcr = sw_r32(priv->r->mac_force_mode_ctrl(port));
if (mode == MLO_AN_PHY || phylink_autoneg_inband(mode)) {
pr_debug("port %d PHY autonegotiates\n", port);
- rtl83xx_config_interface(port, state->interface);
+
mcr |= RTL838X_NWAY_EN;
} else {
mcr &= ~RTL838X_NWAY_EN;
return 0;
}
-__always_unused
static int rtpcs_838x_init_serdes_common(struct rtpcs_ctrl *ctrl)
{
u32 val;
return 0;
}
-__always_unused
static int rtpcs_838x_setup_serdes(struct rtpcs_ctrl *ctrl, int sds,
phy_interface_t mode)
{
.mac_rx_pause_sts = RTPCS_838X_MAC_RX_PAUSE_STS,
.mac_tx_pause_sts = RTPCS_838X_MAC_TX_PAUSE_STS,
.pcs_ops = &rtpcs_838x_pcs_ops,
+ .init_serdes_common = rtpcs_838x_init_serdes_common,
+ .setup_serdes = rtpcs_838x_setup_serdes,
};
static const struct phylink_pcs_ops rtpcs_839x_pcs_ops = {
/* Read the link and speed status of the 2 internal SGMII/1000Base-X
* ports of the RTL838x SoCs
*/
+__attribute__((unused))
static int rtl8380_read_status(struct phy_device *phydev)
{
int err;
if (addr < 24)
return -ENODEV;
- /* On the RTL8380M, PHYs 24-27 connect to the internal SerDes */
- if (soc_info.id == 0x8380) {
- if (addr == 24)
- return rtl8380_configure_serdes(phydev);
- return 0;
- }
-
- return -ENODEV;
+ return 0;
}
static int rtl8393_serdes_probe(struct phy_device *phydev)